\doxysubsubsubsection{FLASH Interrupt definition }
\hypertarget{group___f_l_a_s_h___interrupt__definition}{}\label{group___f_l_a_s_h___interrupt__definition}\index{FLASH Interrupt definition@{FLASH Interrupt definition}}


FLASH Interrupt definition.  


\doxysubsubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga1ec1ef5c1c76161b7dfe81e180e4b3bc}{FLASH\+\_\+\+IT\+\_\+\+EOP\+\_\+\+BANK1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gab9e69856f654ec430a42791a34799db0}{FLASH\+\_\+\+CR\+\_\+\+EOPIE}}
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga0982dd9273150c589c64384f98680f8c}{FLASH\+\_\+\+IT\+\_\+\+WRPERR\+\_\+\+BANK1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3fb16250168b407d58021199f2e55dd6}{FLASH\+\_\+\+CR\+\_\+\+WRPERRIE}}
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga75f2443e9186b6010c22df22a7d0a795}{FLASH\+\_\+\+IT\+\_\+\+PGSERR\+\_\+\+BANK1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gae8deb645d3931dba28cf1ce31c25b3b2}{FLASH\+\_\+\+CR\+\_\+\+PGSERRIE}}
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga24700978c9b5fcf608a28a55bb0bfb82}{FLASH\+\_\+\+IT\+\_\+\+STRBERR\+\_\+\+BANK1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga668cc207455dd7b5180de23c70876de2}{FLASH\+\_\+\+CR\+\_\+\+STRBERRIE}}
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga94ed32b4323dad1fbdabf08514da5473}{FLASH\+\_\+\+IT\+\_\+\+INCERR\+\_\+\+BANK1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gae220b6ecd74fb7cbd19e072b3a00085e}{FLASH\+\_\+\+CR\+\_\+\+INCERRIE}}
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga63d27c2a86d8baeb592764e034214796}{FLASH\+\_\+\+IT\+\_\+\+RDPERR\+\_\+\+BANK1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaac4593fa3b719667158986af4d44846b}{FLASH\+\_\+\+CR\+\_\+\+RDPERRIE}}
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga13eaaa8999f0beeb6ba8bf85904b28fb}{FLASH\+\_\+\+IT\+\_\+\+RDSERR\+\_\+\+BANK1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9ee5c20523359c7a1cf348ba71867502}{FLASH\+\_\+\+CR\+\_\+\+RDSERRIE}}
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga28519e989fe0b990de8ed886beac03d1}{FLASH\+\_\+\+IT\+\_\+\+SNECCERR\+\_\+\+BANK1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3ded89effc76714dc0fecd93a8877dcb}{FLASH\+\_\+\+CR\+\_\+\+SNECCERRIE}}
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_gaabb332bc14eb56d71f8407f68f804510}{FLASH\+\_\+\+IT\+\_\+\+DBECCERR\+\_\+\+BANK1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaeeb7a4dc65c20e72f61bcb221a78f42}{FLASH\+\_\+\+CR\+\_\+\+DBECCERRIE}}
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga196e6f4de2ebe393b60c266915a3bb7e}{FLASH\+\_\+\+IT\+\_\+\+CRCEND\+\_\+\+BANK1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa6202de9f4d37382c3a52afe3c2cd655}{FLASH\+\_\+\+CR\+\_\+\+CRCENDIE}}
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga82dc3ee19141b5c071d2fa8db946ebe3}{FLASH\+\_\+\+IT\+\_\+\+CRCRDERR\+\_\+\+BANK1}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gad8bf514ceab184ed0c0a1d661815ba5a}{FLASH\+\_\+\+CR\+\_\+\+CRCRDERRIE}}
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga08cb91e82083fec8239ba581f4437feb}{FLASH\+\_\+\+IT\+\_\+\+ALL\+\_\+\+BANK1}}
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga8345669c6dc0421104392dd926f1d47f}{FLASH\+\_\+\+IT\+\_\+\+EOP\+\_\+\+BANK2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gab9e69856f654ec430a42791a34799db0}{FLASH\+\_\+\+CR\+\_\+\+EOPIE}}      \texorpdfstring{$\vert$}{|} 0x80000000U)
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga0e1cdf3a8de710205f1089662e8ec60e}{FLASH\+\_\+\+IT\+\_\+\+WRPERR\+\_\+\+BANK2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3fb16250168b407d58021199f2e55dd6}{FLASH\+\_\+\+CR\+\_\+\+WRPERRIE}}   \texorpdfstring{$\vert$}{|} 0x80000000U)
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_gaee38b44a624d8b1f3b376a29add7eabb}{FLASH\+\_\+\+IT\+\_\+\+PGSERR\+\_\+\+BANK2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gae8deb645d3931dba28cf1ce31c25b3b2}{FLASH\+\_\+\+CR\+\_\+\+PGSERRIE}}   \texorpdfstring{$\vert$}{|} 0x80000000U)
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_gac2bb0fa7590ba98dc0cd8c0d082ce8ab}{FLASH\+\_\+\+IT\+\_\+\+STRBERR\+\_\+\+BANK2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga668cc207455dd7b5180de23c70876de2}{FLASH\+\_\+\+CR\+\_\+\+STRBERRIE}}  \texorpdfstring{$\vert$}{|} 0x80000000U)
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga5ffef1590d3e34618ead8ad0c73609ad}{FLASH\+\_\+\+IT\+\_\+\+INCERR\+\_\+\+BANK2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gae220b6ecd74fb7cbd19e072b3a00085e}{FLASH\+\_\+\+CR\+\_\+\+INCERRIE}}   \texorpdfstring{$\vert$}{|} 0x80000000U)
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_gaa9938793bc0431bdbba273f38123372e}{FLASH\+\_\+\+IT\+\_\+\+RDPERR\+\_\+\+BANK2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaac4593fa3b719667158986af4d44846b}{FLASH\+\_\+\+CR\+\_\+\+RDPERRIE}}   \texorpdfstring{$\vert$}{|} 0x80000000U)
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga0613c2c2451c9b07a91b661ee2c03648}{FLASH\+\_\+\+IT\+\_\+\+RDSERR\+\_\+\+BANK2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9ee5c20523359c7a1cf348ba71867502}{FLASH\+\_\+\+CR\+\_\+\+RDSERRIE}}   \texorpdfstring{$\vert$}{|} 0x80000000U)
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga41a3c918d208bbcdaae67abf0ebe9900}{FLASH\+\_\+\+IT\+\_\+\+SNECCERR\+\_\+\+BANK2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3ded89effc76714dc0fecd93a8877dcb}{FLASH\+\_\+\+CR\+\_\+\+SNECCERRIE}} \texorpdfstring{$\vert$}{|} 0x80000000U)
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga8d4c4f393d3dcaf9e4bc547fe8163f8e}{FLASH\+\_\+\+IT\+\_\+\+DBECCERR\+\_\+\+BANK2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaeeb7a4dc65c20e72f61bcb221a78f42}{FLASH\+\_\+\+CR\+\_\+\+DBECCERRIE}} \texorpdfstring{$\vert$}{|} 0x80000000U)
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga0316e91aff7629580bed1a5cc9c11e75}{FLASH\+\_\+\+IT\+\_\+\+CRCEND\+\_\+\+BANK2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa6202de9f4d37382c3a52afe3c2cd655}{FLASH\+\_\+\+CR\+\_\+\+CRCENDIE}}   \texorpdfstring{$\vert$}{|} 0x80000000U)
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga81f4bdb6e41b6f99d9de03ca0b37b898}{FLASH\+\_\+\+IT\+\_\+\+CRCRDERR\+\_\+\+BANK2}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gad8bf514ceab184ed0c0a1d661815ba5a}{FLASH\+\_\+\+CR\+\_\+\+CRCRDERRIE}} \texorpdfstring{$\vert$}{|} 0x80000000U)
\item 
\#define \mbox{\hyperlink{group___f_l_a_s_h___interrupt__definition_ga3140138329c41338bcd139d5fb6d019f}{FLASH\+\_\+\+IT\+\_\+\+ALL\+\_\+\+BANK2}}
\end{DoxyCompactItemize}


\doxysubsubsubsubsection{Detailed Description}
FLASH Interrupt definition. 



\label{doc-define-members}
\Hypertarget{group___f_l_a_s_h___interrupt__definition_doc-define-members}
\doxysubsubsubsubsection{Macro Definition Documentation}
\Hypertarget{group___f_l_a_s_h___interrupt__definition_ga08cb91e82083fec8239ba581f4437feb}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_ALL\_BANK1@{FLASH\_IT\_ALL\_BANK1}}
\index{FLASH\_IT\_ALL\_BANK1@{FLASH\_IT\_ALL\_BANK1}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_ALL\_BANK1}{FLASH\_IT\_ALL\_BANK1}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga08cb91e82083fec8239ba581f4437feb} 
\#define FLASH\+\_\+\+IT\+\_\+\+ALL\+\_\+\+BANK1}

{\bfseries Value\+:}
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All Bank 1 Interrupt sources \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga3140138329c41338bcd139d5fb6d019f}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_ALL\_BANK2@{FLASH\_IT\_ALL\_BANK2}}
\index{FLASH\_IT\_ALL\_BANK2@{FLASH\_IT\_ALL\_BANK2}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_ALL\_BANK2}{FLASH\_IT\_ALL\_BANK2}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga3140138329c41338bcd139d5fb6d019f} 
\#define FLASH\+\_\+\+IT\+\_\+\+ALL\+\_\+\+BANK2}

{\bfseries Value\+:}
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All Bank 2 Interrupt sources \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga196e6f4de2ebe393b60c266915a3bb7e}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_CRCEND\_BANK1@{FLASH\_IT\_CRCEND\_BANK1}}
\index{FLASH\_IT\_CRCEND\_BANK1@{FLASH\_IT\_CRCEND\_BANK1}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_CRCEND\_BANK1}{FLASH\_IT\_CRCEND\_BANK1}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga196e6f4de2ebe393b60c266915a3bb7e} 
\#define FLASH\+\_\+\+IT\+\_\+\+CRCEND\+\_\+\+BANK1~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa6202de9f4d37382c3a52afe3c2cd655}{FLASH\+\_\+\+CR\+\_\+\+CRCENDIE}}}

CRC End on Bank 1 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga0316e91aff7629580bed1a5cc9c11e75}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_CRCEND\_BANK2@{FLASH\_IT\_CRCEND\_BANK2}}
\index{FLASH\_IT\_CRCEND\_BANK2@{FLASH\_IT\_CRCEND\_BANK2}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_CRCEND\_BANK2}{FLASH\_IT\_CRCEND\_BANK2}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga0316e91aff7629580bed1a5cc9c11e75} 
\#define FLASH\+\_\+\+IT\+\_\+\+CRCEND\+\_\+\+BANK2~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa6202de9f4d37382c3a52afe3c2cd655}{FLASH\+\_\+\+CR\+\_\+\+CRCENDIE}}   \texorpdfstring{$\vert$}{|} 0x80000000U)}

CRC End on Bank 2 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga82dc3ee19141b5c071d2fa8db946ebe3}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_CRCRDERR\_BANK1@{FLASH\_IT\_CRCRDERR\_BANK1}}
\index{FLASH\_IT\_CRCRDERR\_BANK1@{FLASH\_IT\_CRCRDERR\_BANK1}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_CRCRDERR\_BANK1}{FLASH\_IT\_CRCRDERR\_BANK1}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga82dc3ee19141b5c071d2fa8db946ebe3} 
\#define FLASH\+\_\+\+IT\+\_\+\+CRCRDERR\+\_\+\+BANK1~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gad8bf514ceab184ed0c0a1d661815ba5a}{FLASH\+\_\+\+CR\+\_\+\+CRCRDERRIE}}}

CRC Read error on Bank 1 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga81f4bdb6e41b6f99d9de03ca0b37b898}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_CRCRDERR\_BANK2@{FLASH\_IT\_CRCRDERR\_BANK2}}
\index{FLASH\_IT\_CRCRDERR\_BANK2@{FLASH\_IT\_CRCRDERR\_BANK2}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_CRCRDERR\_BANK2}{FLASH\_IT\_CRCRDERR\_BANK2}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga81f4bdb6e41b6f99d9de03ca0b37b898} 
\#define FLASH\+\_\+\+IT\+\_\+\+CRCRDERR\+\_\+\+BANK2~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gad8bf514ceab184ed0c0a1d661815ba5a}{FLASH\+\_\+\+CR\+\_\+\+CRCRDERRIE}} \texorpdfstring{$\vert$}{|} 0x80000000U)}

CRC Read Error on Bank 2 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_gaabb332bc14eb56d71f8407f68f804510}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_DBECCERR\_BANK1@{FLASH\_IT\_DBECCERR\_BANK1}}
\index{FLASH\_IT\_DBECCERR\_BANK1@{FLASH\_IT\_DBECCERR\_BANK1}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_DBECCERR\_BANK1}{FLASH\_IT\_DBECCERR\_BANK1}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_gaabb332bc14eb56d71f8407f68f804510} 
\#define FLASH\+\_\+\+IT\+\_\+\+DBECCERR\+\_\+\+BANK1~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaeeb7a4dc65c20e72f61bcb221a78f42}{FLASH\+\_\+\+CR\+\_\+\+DBECCERRIE}}}

Double Detection ECC Error on Bank 1 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga8d4c4f393d3dcaf9e4bc547fe8163f8e}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_DBECCERR\_BANK2@{FLASH\_IT\_DBECCERR\_BANK2}}
\index{FLASH\_IT\_DBECCERR\_BANK2@{FLASH\_IT\_DBECCERR\_BANK2}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_DBECCERR\_BANK2}{FLASH\_IT\_DBECCERR\_BANK2}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga8d4c4f393d3dcaf9e4bc547fe8163f8e} 
\#define FLASH\+\_\+\+IT\+\_\+\+DBECCERR\+\_\+\+BANK2~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaeeb7a4dc65c20e72f61bcb221a78f42}{FLASH\+\_\+\+CR\+\_\+\+DBECCERRIE}} \texorpdfstring{$\vert$}{|} 0x80000000U)}

Double Detection ECC Error on Bank 2 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga1ec1ef5c1c76161b7dfe81e180e4b3bc}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_EOP\_BANK1@{FLASH\_IT\_EOP\_BANK1}}
\index{FLASH\_IT\_EOP\_BANK1@{FLASH\_IT\_EOP\_BANK1}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_EOP\_BANK1}{FLASH\_IT\_EOP\_BANK1}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga1ec1ef5c1c76161b7dfe81e180e4b3bc} 
\#define FLASH\+\_\+\+IT\+\_\+\+EOP\+\_\+\+BANK1~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gab9e69856f654ec430a42791a34799db0}{FLASH\+\_\+\+CR\+\_\+\+EOPIE}}}

End of FLASH Bank 1 Operation Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga8345669c6dc0421104392dd926f1d47f}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_EOP\_BANK2@{FLASH\_IT\_EOP\_BANK2}}
\index{FLASH\_IT\_EOP\_BANK2@{FLASH\_IT\_EOP\_BANK2}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_EOP\_BANK2}{FLASH\_IT\_EOP\_BANK2}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga8345669c6dc0421104392dd926f1d47f} 
\#define FLASH\+\_\+\+IT\+\_\+\+EOP\+\_\+\+BANK2~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gab9e69856f654ec430a42791a34799db0}{FLASH\+\_\+\+CR\+\_\+\+EOPIE}}      \texorpdfstring{$\vert$}{|} 0x80000000U)}

End of FLASH Bank 2 Operation Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga94ed32b4323dad1fbdabf08514da5473}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_INCERR\_BANK1@{FLASH\_IT\_INCERR\_BANK1}}
\index{FLASH\_IT\_INCERR\_BANK1@{FLASH\_IT\_INCERR\_BANK1}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_INCERR\_BANK1}{FLASH\_IT\_INCERR\_BANK1}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga94ed32b4323dad1fbdabf08514da5473} 
\#define FLASH\+\_\+\+IT\+\_\+\+INCERR\+\_\+\+BANK1~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gae220b6ecd74fb7cbd19e072b3a00085e}{FLASH\+\_\+\+CR\+\_\+\+INCERRIE}}}

Inconsistency Error on Bank 1 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga5ffef1590d3e34618ead8ad0c73609ad}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_INCERR\_BANK2@{FLASH\_IT\_INCERR\_BANK2}}
\index{FLASH\_IT\_INCERR\_BANK2@{FLASH\_IT\_INCERR\_BANK2}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_INCERR\_BANK2}{FLASH\_IT\_INCERR\_BANK2}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga5ffef1590d3e34618ead8ad0c73609ad} 
\#define FLASH\+\_\+\+IT\+\_\+\+INCERR\+\_\+\+BANK2~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gae220b6ecd74fb7cbd19e072b3a00085e}{FLASH\+\_\+\+CR\+\_\+\+INCERRIE}}   \texorpdfstring{$\vert$}{|} 0x80000000U)}

Inconsistency Error on Bank 2 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga75f2443e9186b6010c22df22a7d0a795}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_PGSERR\_BANK1@{FLASH\_IT\_PGSERR\_BANK1}}
\index{FLASH\_IT\_PGSERR\_BANK1@{FLASH\_IT\_PGSERR\_BANK1}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_PGSERR\_BANK1}{FLASH\_IT\_PGSERR\_BANK1}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga75f2443e9186b6010c22df22a7d0a795} 
\#define FLASH\+\_\+\+IT\+\_\+\+PGSERR\+\_\+\+BANK1~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gae8deb645d3931dba28cf1ce31c25b3b2}{FLASH\+\_\+\+CR\+\_\+\+PGSERRIE}}}

Program Sequence Error on Bank 1 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_gaee38b44a624d8b1f3b376a29add7eabb}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_PGSERR\_BANK2@{FLASH\_IT\_PGSERR\_BANK2}}
\index{FLASH\_IT\_PGSERR\_BANK2@{FLASH\_IT\_PGSERR\_BANK2}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_PGSERR\_BANK2}{FLASH\_IT\_PGSERR\_BANK2}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_gaee38b44a624d8b1f3b376a29add7eabb} 
\#define FLASH\+\_\+\+IT\+\_\+\+PGSERR\+\_\+\+BANK2~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gae8deb645d3931dba28cf1ce31c25b3b2}{FLASH\+\_\+\+CR\+\_\+\+PGSERRIE}}   \texorpdfstring{$\vert$}{|} 0x80000000U)}

Program Sequence Error on Bank 2 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga63d27c2a86d8baeb592764e034214796}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_RDPERR\_BANK1@{FLASH\_IT\_RDPERR\_BANK1}}
\index{FLASH\_IT\_RDPERR\_BANK1@{FLASH\_IT\_RDPERR\_BANK1}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_RDPERR\_BANK1}{FLASH\_IT\_RDPERR\_BANK1}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga63d27c2a86d8baeb592764e034214796} 
\#define FLASH\+\_\+\+IT\+\_\+\+RDPERR\+\_\+\+BANK1~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaac4593fa3b719667158986af4d44846b}{FLASH\+\_\+\+CR\+\_\+\+RDPERRIE}}}

Read protection Error on Bank 1 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_gaa9938793bc0431bdbba273f38123372e}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_RDPERR\_BANK2@{FLASH\_IT\_RDPERR\_BANK2}}
\index{FLASH\_IT\_RDPERR\_BANK2@{FLASH\_IT\_RDPERR\_BANK2}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_RDPERR\_BANK2}{FLASH\_IT\_RDPERR\_BANK2}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_gaa9938793bc0431bdbba273f38123372e} 
\#define FLASH\+\_\+\+IT\+\_\+\+RDPERR\+\_\+\+BANK2~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaac4593fa3b719667158986af4d44846b}{FLASH\+\_\+\+CR\+\_\+\+RDPERRIE}}   \texorpdfstring{$\vert$}{|} 0x80000000U)}

Read protection Error on Bank 2 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga13eaaa8999f0beeb6ba8bf85904b28fb}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_RDSERR\_BANK1@{FLASH\_IT\_RDSERR\_BANK1}}
\index{FLASH\_IT\_RDSERR\_BANK1@{FLASH\_IT\_RDSERR\_BANK1}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_RDSERR\_BANK1}{FLASH\_IT\_RDSERR\_BANK1}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga13eaaa8999f0beeb6ba8bf85904b28fb} 
\#define FLASH\+\_\+\+IT\+\_\+\+RDSERR\+\_\+\+BANK1~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9ee5c20523359c7a1cf348ba71867502}{FLASH\+\_\+\+CR\+\_\+\+RDSERRIE}}}

Read Secured Error on Bank 1 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga0613c2c2451c9b07a91b661ee2c03648}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_RDSERR\_BANK2@{FLASH\_IT\_RDSERR\_BANK2}}
\index{FLASH\_IT\_RDSERR\_BANK2@{FLASH\_IT\_RDSERR\_BANK2}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_RDSERR\_BANK2}{FLASH\_IT\_RDSERR\_BANK2}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga0613c2c2451c9b07a91b661ee2c03648} 
\#define FLASH\+\_\+\+IT\+\_\+\+RDSERR\+\_\+\+BANK2~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9ee5c20523359c7a1cf348ba71867502}{FLASH\+\_\+\+CR\+\_\+\+RDSERRIE}}   \texorpdfstring{$\vert$}{|} 0x80000000U)}

Read Secured Error on Bank 2 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga28519e989fe0b990de8ed886beac03d1}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_SNECCERR\_BANK1@{FLASH\_IT\_SNECCERR\_BANK1}}
\index{FLASH\_IT\_SNECCERR\_BANK1@{FLASH\_IT\_SNECCERR\_BANK1}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_SNECCERR\_BANK1}{FLASH\_IT\_SNECCERR\_BANK1}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga28519e989fe0b990de8ed886beac03d1} 
\#define FLASH\+\_\+\+IT\+\_\+\+SNECCERR\+\_\+\+BANK1~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3ded89effc76714dc0fecd93a8877dcb}{FLASH\+\_\+\+CR\+\_\+\+SNECCERRIE}}}

Single ECC Error Correction on Bank 1 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga41a3c918d208bbcdaae67abf0ebe9900}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_SNECCERR\_BANK2@{FLASH\_IT\_SNECCERR\_BANK2}}
\index{FLASH\_IT\_SNECCERR\_BANK2@{FLASH\_IT\_SNECCERR\_BANK2}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_SNECCERR\_BANK2}{FLASH\_IT\_SNECCERR\_BANK2}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga41a3c918d208bbcdaae67abf0ebe9900} 
\#define FLASH\+\_\+\+IT\+\_\+\+SNECCERR\+\_\+\+BANK2~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3ded89effc76714dc0fecd93a8877dcb}{FLASH\+\_\+\+CR\+\_\+\+SNECCERRIE}} \texorpdfstring{$\vert$}{|} 0x80000000U)}

Single ECC Error Correction on Bank 2 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga24700978c9b5fcf608a28a55bb0bfb82}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_STRBERR\_BANK1@{FLASH\_IT\_STRBERR\_BANK1}}
\index{FLASH\_IT\_STRBERR\_BANK1@{FLASH\_IT\_STRBERR\_BANK1}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_STRBERR\_BANK1}{FLASH\_IT\_STRBERR\_BANK1}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga24700978c9b5fcf608a28a55bb0bfb82} 
\#define FLASH\+\_\+\+IT\+\_\+\+STRBERR\+\_\+\+BANK1~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga668cc207455dd7b5180de23c70876de2}{FLASH\+\_\+\+CR\+\_\+\+STRBERRIE}}}

Strobe Error on Bank 1 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_gac2bb0fa7590ba98dc0cd8c0d082ce8ab}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_STRBERR\_BANK2@{FLASH\_IT\_STRBERR\_BANK2}}
\index{FLASH\_IT\_STRBERR\_BANK2@{FLASH\_IT\_STRBERR\_BANK2}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_STRBERR\_BANK2}{FLASH\_IT\_STRBERR\_BANK2}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_gac2bb0fa7590ba98dc0cd8c0d082ce8ab} 
\#define FLASH\+\_\+\+IT\+\_\+\+STRBERR\+\_\+\+BANK2~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga668cc207455dd7b5180de23c70876de2}{FLASH\+\_\+\+CR\+\_\+\+STRBERRIE}}  \texorpdfstring{$\vert$}{|} 0x80000000U)}

Strobe Error on Bank 2 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga0982dd9273150c589c64384f98680f8c}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_WRPERR\_BANK1@{FLASH\_IT\_WRPERR\_BANK1}}
\index{FLASH\_IT\_WRPERR\_BANK1@{FLASH\_IT\_WRPERR\_BANK1}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_WRPERR\_BANK1}{FLASH\_IT\_WRPERR\_BANK1}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga0982dd9273150c589c64384f98680f8c} 
\#define FLASH\+\_\+\+IT\+\_\+\+WRPERR\+\_\+\+BANK1~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3fb16250168b407d58021199f2e55dd6}{FLASH\+\_\+\+CR\+\_\+\+WRPERRIE}}}

Write Protection Error on Bank 1 Interrupt source \Hypertarget{group___f_l_a_s_h___interrupt__definition_ga0e1cdf3a8de710205f1089662e8ec60e}\index{FLASH Interrupt definition@{FLASH Interrupt definition}!FLASH\_IT\_WRPERR\_BANK2@{FLASH\_IT\_WRPERR\_BANK2}}
\index{FLASH\_IT\_WRPERR\_BANK2@{FLASH\_IT\_WRPERR\_BANK2}!FLASH Interrupt definition@{FLASH Interrupt definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{FLASH\_IT\_WRPERR\_BANK2}{FLASH\_IT\_WRPERR\_BANK2}}
{\footnotesize\ttfamily \label{group___f_l_a_s_h___interrupt__definition_ga0e1cdf3a8de710205f1089662e8ec60e} 
\#define FLASH\+\_\+\+IT\+\_\+\+WRPERR\+\_\+\+BANK2~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3fb16250168b407d58021199f2e55dd6}{FLASH\+\_\+\+CR\+\_\+\+WRPERRIE}}   \texorpdfstring{$\vert$}{|} 0x80000000U)}

Write Protection Error on Bank 2 Interrupt source 